Byan,

You should definately take a look at links like Train posted (and others). It still seems you aren't entirely clear on the distinction between the FSB (front side bus) numbers and terms one sees (as in say a processor using an 800mhz fsb speed and being quad-pumped, etc) and those relating to the memory bus (DDR, DDR400, PC3200, etc). Again, these are different and independent highways/pathways (buses) on which data is moved. They rely on different clockings/timings, have unique design/architectural aspects, protocols, etc. The front side bus (which is really a term today that has to be used loosely as the Intels don't even use an FSB, but instead use a Hub architecture) is the path(s) from the cpu to the chipset efectively. The memory bus is then another path going from the memory controller(s) to the chipset (there are also other pathways/buses: PCI, AGP, etc).

When you have (say) a P4 processor that requires a 533mhz FSB speed it means that the data transfer speed between the processor and the chipset (not memory) will take place at an "effective" rate equivalent to 533mhz. Now it is an "effective" rate because the actual signal clocking is not 533mhz, it's 133mhz. Instead the technique of quad-pumping is used. This effectively allows getting/putting four pieces of data (signals) on the the bus between the processor and chipset in the time frame of one clock cylce (1mhz). Again though, this timing/clocking and the techinique(s) used to acheive it has nothing directly to do with your memory, its timing, or the methods used to achieve that timing/flow.

Then in regard to the memoy... Now say you have PC2700 memory that you want to use. PC2700 memory is a type of dram that uses (relies on) a DDR (double data rate) protocol in terms of communincation (technique) on the memory bus. With this particular protocol two pieces of data (so to speak) are transmitted for every clock cycle. This is accomplished (in this particular case) by transmitting one piece at the start of a clock pulse (on the "rising" edge") and another at the end of the same clock pulse (on the "falling" edge"). Now PC2700 memory is referred to as DDR33. But it doesn't actually run (use) a 333mhz clocking. Instead it uses a 166mhz clocking. But becasue of the doubling of data moved on the memory bus here per clock cycle a rate "equivalent" to 333mhz is acheived, on the "memory bus" (distinct from the cpu, its bus timing and the method(s) employed in acheiving that timing). And, when you talk about "dual channel" memory that is another whole distinct thing tied in to the movement of data bewteen dram and the memory controller(s).

These were just a couple quick (boiled down) examples to try and (hopefully) make some sense (and disctinction) between some of this stuff. There is (can be) a lot more to these things depending on the particular process, motherboard, chipset and ram you're talking about. The above is not the way things work or are done universally, but it relates to some of what had come up in this thread.